Fujitsu, Petra, And Nedo Achieve World's Lowest Energy Requirements Of 5 Mw Per 1 Gbps For High - Speed Inter - Processor Data Transmissions


Fujitsu, PETRA, and NEDO Achieve World's Lowest Energy Requirements of 5 mW per 1 Gbps for High-Speed Inter-Processor Data TransmissionsFujitsu Limited, Fujitsu Laboratories Ltd., Fujitsu Laboratories of America, Inc., the Photonics Electronics Technology Research Association (PETRA), and the New Energy and Industrial Technology Development Organization (NEDO) today announced that they have jointly developed the world's most energy-efficient silicon photonics(1) optical transceiver circuit for high-speed data transmissions between CPUs in servers and supercomputers, requiring only 5 mW of electricity per 1 Gbps(2) of transmission speed.
Optical devices have needed a certain amount of voltage in order to run at high speeds, making it difficult to reduce the power needed for optical transceiver circuits. Now Fujitsu and its partners have developed a technology that allows optical devices to be run at a low voltage by significantly increasing amplitude when there is a change in the data being transmitted, resulting in high-speed operations of 25 Gbps at half the power previously required. While reducing the amount of power consumed, this technology enables multiple optical transceiver circuits to run in parallel for high-speed, terabit-class transmissions, and is therefore expected to raise the performance of servers and supercomputers. Parts of this technology were developed in the "Integrated Photonics-Electronics Convergence System Technology (PECST)" project that NEDO entrusted to PETRA, while Fujitsu Limited, Fujitsu Laboratories, and Fujitsu Laboratories of America are collaborating to develop the transceiver circuit technology. Details of this technology are being presented at IEEE International Solid-State Circuits Conference 2015 (ISSCC 2015), the foremost global forum for solid-state circuits, opening February 22 in San Francisco (ISSCC presentation 22.2).
Background

With large-scale system servers and supercomputers that possess multiple connected CPUs, the volume of data transmitted within and between CPU-equipped units continues to rise as performance levels increase. Improving the performance of servers and supercomputers, therefore, requires not just raising the calculating performance of each individual CPU, but also raising the speed of data transmissions between connected CPUs. Overall systems for servers and supercomputers require significant amounts of power, but due to constraints on the amount of power facilities can supply, there is a desire to increase the data transmission speeds of transceiver circuits without increasing the amount of power consumed. For silicon photonics-based optical transceiver technology, which holds significant promise for the next generation of high-performance supercomputers, optical devices are effectively limited to transmission speeds of 25 Gbps. One way of increasing overall transmission speeds is to run in parallel multiple optical devices and the electronic circuitry of their optical transceiver circuits. There is a need to double the speed of data transmissions between CPUs in four years. So to achieve this doubling while holding power constant, the power consumed by optical transceiver circuits needs to be cut in half .

Technological Issues

Typically, with high-speed, 25 Gbps optical transmissions, optical devices operate at 3 volts (V) or higher, compared to the 0.9 V that CPUs and other electronic circuits need. Because transmission circuits that drive optical devices also operate at higher voltages in order to constantly send high-amplitude signals to the optical devices for high-speed operations, reducing their power consumption has proven difficult. Conversely, if optical devices operating at 0.9 V, the same low voltage as the CPU, were employed to consume less power, only a problematically low-speed operation of around 1 Gbps could be achieved .

About the Technology

Now, by amplifying the transmission signal only when the signal from the CPU changes to -1 and +1, the researchers on this project succeeded at generating amplitudes intermittently at around 1.8 V. As a result, the supplied voltage is 1.8 V, lower than the 3.3 V previously required, and because power is not used with smaller amplitudes when the data do not change, less power is consumed. The principal behind this technology is that the data being transmitted is combined with delayed data that is multiplied by -? (where 0 < ? < 1), so that when the transmission data changes from -1 to +1, +1 is amplified to +1+?. On the other hand, when the transmission data changes from +1 to -1, -1 can be amplified further to -1-? . This technology enables both higher speeds and lower power consumption, and the researchers on the project confirmed that they could achieve high-speed transmissions of 25 Gbps while operating at half the power previously required, achieving operation of 5 mW of electricity per 1 Gbps of transmission speed .

Results

While reducing the amount of power consumed, this technology enables multiple optical transceiver circuits to run in parallel for high-speed, terabit-class transmissions, and is therefore expected to raise the performance of servers and supercomputers.
Future Plans

Fujitsu Laboratories is applying this technology to the interfaces of CPUs and optical modules, and aims for practical implementations in fiscal 2018. The company is also studying applications in the next generation of high-performance servers and supercomputers.